For the past couple of months I’ve been working on a small, low-cost successor to the PETvet, which was a 6502 RAM/ROM replacement board with debug capabilities over a serial port. At the same time, I wanted to learn a bit about FPGA development, so the ROMulator was born.
The ROMulator uses a Lattice UltraPlus FPGA to implement both a full 64k memory map plus memory decode logic to enable/disable different sections of memory. It also allows halting a running 6502 CPU and sending out the memory contents over SPI to a connected Raspberry Pi. You can also update the memory contents and resume CPU execution.
The ROMulator has two separate small boards – a 6502 socket board which takes, surprise, a 6502 CPU, and a few 74LVC245 level-shifting buffers to convert 5v logic from the CPU to 3.3v which the FPGA can handle. Connected to this board is a DIP breakout with the FPGA, which also has regulators for the appropriate voltages to power the FPGA and an SPI flash. The flash stores both the FPGA bitstream which defines its hardware implementation and up to 16 full 64k memory maps, which are selectable by a DIP switch on the ROMulator. This allows you to pick any of these for your boot ROM image.